EC205N Digital System Design Lab
Course Name:
EC205N Digital System Design Lab
Programme:
B.Tech (ECE)
Semester:
Third
Category:
Programme Core (PC)
Credits (L-T-P):
(0-0-3) 1.5
Content:
Familiarization of software and trainer kits, and HDL. Experiments implementing simple combinational circuits using logic gates. Implementation of comparator and code converter circuits. Implementation of multiplexer, demultiplexers, encoders & decoder circuits. Design and implementation of Arithmetic Building Blocks for Digital Systems. Implementation of various flip-flops circuits. Implementation of register & counters. Implementation of sequential circuits. Design and implementation of control logic FSMs. RTL Case study.Term project involving complete digital system design and implementation on a suitable FPGA board.
References:
Mano, M. Morris R., and Michael D. Ciletti. Digital Design: With an Introduction to the Verilog HDL, VHDL,
and SystemVerilog. 6th ed., Pearson Education, 2018
Brown, Stephen D., and Zvonko G. Vranesic. Fundamentals of Digital Logic with Verilog Design. 4th ed.,
2025
https://nptel.ac.in/courses/106105165
Department:
Electronics and Communication Engineering(ECE)