Logic gates, Boolean algebra, Positional number systems, representation of negative numbers, binary arithmetic code, Switching algebras, Introduction to HDL (Verilog), Behavioral, structural and dataflow modeling and simulation. Combinational circuit analysis, Minimization techniques – K map, Combinational circuit synthesis using gates. Combinational circuit synthesis using MSI ICs. Modeling Combinational circuits using Verilog HDL. Latches and flip flops, Setup and Hold time, Clock period and frequency, Analysis of sequential circuits. Synchronous sequential circuit synthesis using flipflops and MSI ICs. Synchronous sequential circuit modeling with HDL Finite state machine (FSM) synthesis using flipflops.Finite state machine(FSM) modeling with HDL. ASM charts, state minimization, state assignment. Design case studies(ex. processor data path and control path)